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<title>
GCC 6 Release Series — Changes, New Features, and Fixes
- GNU Project - Free Software Foundation (FSF)</title>
</head>
<!-- GCC maintainers, please do not hesitate to update/contribute entries
concerning those part of GCC you maintain! 2002-03-23, Gerald.
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<body>
<h1>GCC 6 Release Series<br />Changes, New Features, and Fixes</h1>
<p>
This page is a brief summary of some of the huge number of improvements in GCC 6.
For more information, see the
<a href="porting_to.html">Porting to GCC 6</a> page and the
<a href="../onlinedocs/index.html#current">full GCC documentation</a>.
</p>
<!-- .................................................................. -->
<h2>Caveats</h2>
<ul>
<li>The default mode for C++ is now <code>-std=gnu++14</code> instead of
<code>-std=gnu++98</code>.</li>
<li><p>Support for a number of older systems and recently
unmaintained or untested target ports of GCC has been declared
obsolete in GCC 6. Unless there is activity to revive them, the
next release of GCC will have their sources permanently
<strong>removed</strong>.</p>
<p>The following ports for individual systems on
particular architectures have been obsoleted:</p>
<ul>
<li>SH5 / SH64 (sh64-*-*) as announced
<a href="https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html">
here</a>.</li>
</ul>
</li>
</ul>
<!-- .................................................................. -->
<h2 id="general">General Optimizer Improvements</h2>
<ul>
<li>UndefinedBehaviorSanitizer gained a new sanitization option,
<code>-fsanitize=bounds-strict</code>, which enables strict checking
of array bounds. In particular, it enables
<code>-fsanitize=bounds</code> as well as instrumentation of
flexible array member-like arrays.</li>
<li>Type-based alias analysis now disambiguates accesses to different
pointers. This improves precision of the alias oracle by about 20-30%
on higher-level C++ programs. Programs doing invalid type punning
of pointer types may now need <code>-fno-strict-aliasing</code>
to work correctly.</li>
<li>Alias analysis now correctly supports <code>weakref</code> and
<code>alias</code> attributes. This makes it possible to access
both a variable and its alias in one translation unit which is common
with link-time optimization.</li>
<li>Value range propagation now assumes that the <code>this</code> pointer
of C++ member functions is non-null. This eliminates
common null pointer checks
but also breaks some non-conforming code-bases (such as Qt-5, Chromium,
KDevelop). As a temporary work-around
<code>-fno-delete-null-pointer-checks</code> can be used. Wrong
code can be identified by using <code>-fsanitize=undefined</code>.</li>
<li>Link-time optimization improvements:
<ul>
<li><code>warning</code> and <code>error</code> attributes are now
correctly preserved by declaration linking and thus
<code>-D_FORTIFY_SOURCE=2</code> is now supported with <code>-flto</code>.</li>
<li><p>Type merging was fixed to handle C and Fortran interoperability
rules as defined by the Fortran 2008 language standard.</p>
<p>
As an exception, <code>CHARACTER(KIND=C_CHAR)</code> is not inter-operable
with <code>char</code> in all cases because it is an array while
<code>char</code> is scalar.
<code>INTEGER(KIND=C_SIGNED_CHAR)</code> should be used instead.
In general, this inter-operability cannot be implemented, for
example, on targets where function passing conventions of arrays
differs from scalars.</p></li>
<li>More type information is now preserved at link time reducing
the loss of accuracy of the type based alias analysis compared
to builds without link-time optimization.</li>
<li>Invalid type punning on global variables and declarations is now
reported with <code>-Wodr-type-mismatch</code>.</li>
<li>The size of LTO object files was reduced by about 11% (measured
by compiling Firefox 46.0).</li>
<li>Link-time parallelization (enabled using <code>-flto=n</code>)
was significantly improved by decreasing the size of streamed
data when partitioning programs. The size of streamed
IL while compiling Firefox 46.0 was reduced by 66%.</li>
<li><p>The linker plugin was extended to pass information about type of
binary produced to GCC back end (that can be also manually controlled
by <code>-flinker-output</code>). This makes it possible to
properly configure the code generator and support incremental
linking. Incremental linking of LTO objects by <code>gcc -r</code> is
now supported on plugin-enabled setups.</p>
<p>There are two ways to perform incremental linking:</p>
<ol>
<li>Linking by <code>ld -r</code> will result in an object file
with all sections from individual object files mechanically merged.
This delays the actual link time optimization to final linking step
and thus permits whole program optimization. Linking final binary
with such object files is however slower.</li>
<li>Linking by <code>gcc -r</code> will lead to link time optimization
and produce final binary into the object file. Linking such object
file is fast but avoids any benefits from whole program optimization.</li>
</ol>
GCC 7 will support incremental link-time optimization with <code>gcc -r</code>.</li>
</ul></li>
<li>Inter-procedural optimization improvements:
<ul>
<li>Basic jump threading is now performed before profile construction
and inline analysis, resulting in more realistic size and time estimates
that drive the heuristics of the of inliner and function cloning passes.</li>
<li>Function cloning now more aggressively eliminates unused function
parameters.</li>
</ul></li>
</ul>
<!-- .................................................................. -->
<h2 id="languages">New Languages and Language specific improvements</h2>
<!-- <ul>
<li> -->Compared to GCC 5, the GCC 6 release series includes a much improved
implementation of the <a href="http://www.openacc.org/">OpenACC 2.0a
specification</a>. Highlights are:
<ul>
<li>In addition to single-threaded host-fallback execution, offloading is
supported for nvptx (Nvidia GPUs) on x86_64 and PowerPC 64-bit
little-endian GNU/Linux host systems. For nvptx offloading, with the
OpenACC parallel construct, the execution model allows for an arbitrary
number of gangs, up to 32 workers, and 32 vectors.</li>
<li>Initial support for parallelized execution of OpenACC kernels
constructs:
<ul>
<li>Parallelization of a kernels region is switched on
by <code>-fopenacc</code> combined with <code>-O2</code> or
higher.</li>
<li>Code is offloaded onto multiple gangs, but executes with just one
worker, and a vector length of 1.</li>
<li>Directives inside a kernels region are not supported.</li>
<li>Loops with reductions can be parallelized.</li>
<li>Only kernels regions with one loop nest are parallelized.</li>
<li>Only the outer-most loop of a loop nest can be parallelized.</li>
<li>Loop nests containing sibling loops are not parallelized.</li>
</ul>
Typically, using the OpenACC parallel construct gives much better
performance, compared to the initial support of the OpenACC kernels
construct.</li>
<li>The <code>device_type</code> clause is not supported.
The <code>bind</code> and <code>nohost</code> clauses are not
supported. The <code>host_data</code> directive is not supported in
Fortran.</li>
<li>Nested parallelism (cf. CUDA dynamic parallelism) is not
supported.</li>
<li>Usage of OpenACC constructs inside multithreaded contexts (such as
created by OpenMP, or pthread programming) is not supported.</li>
<li>If a call to the <code>acc_on_device</code> function has a
compile-time constant argument, the function call evaluates to a
compile-time constant value only for C and C++ but not for
Fortran.</li>
</ul>
See the <a href="https://gcc.gnu.org/wiki/OpenACC">OpenACC</a>
and <a href="https://gcc.gnu.org/wiki/Offloading">Offloading</a> wiki pages
for further information.
<!-- </li>
</ul> -->
<!-- <h3 id="ada">Ada</h3> -->
<h3 id="c-family">C family</h3>
<ul>
<li>Version 4.5 of the <a href="http://openmp.org/wp/openmp-specifications/"
>OpenMP specification</a> is now supported in the C and C++ compilers.</li>
<li>The C and C++ compilers now support attributes on enumerators. For instance,
it is now possible to mark enumerators as deprecated:
<blockquote><pre>
enum {
newval,
oldval __attribute__ ((deprecated ("too old")))
};
</pre></blockquote></li>
<li>Source locations for the C and C++ compilers are now tracked as ranges,
rather than just points, making it easier to identify the subexpression
of interest within a complicated expression.
For example:
<blockquote><pre>
<b>test.cc:</b> In function <b>'int test(int, int, foo, int, int)'</b>:
<b>test.cc:5:16:</b> <span class="boldred">error:</span> no match for <b>'operator*'</b> (operand types are <b>'int'</b> and <b>'foo'</b>)
return p + <span class="boldred">q * r</span> * s + t;
<span class="boldred">~~^~~</span>
</pre></blockquote>
In addition, there is now initial support for precise diagnostic locations
within strings:
<blockquote><pre>
<b>format-strings.c:3:14:</b> <span class="boldmagenta">warning:</span> field width specifier <b>'*'</b> expects a matching <b>'int'</b> argument [<span class="boldmagenta">-Wformat=</span>]
printf("%*d");
<span class="boldmagenta">^</span>
</pre></blockquote></li>
<li>Diagnostics can now contain "fix-it hints", which are displayed
in context underneath the relevant source code. For example:
<!-- this is currently the only example in the tree; various others are pending -->
<blockquote><pre>
<b>fixits.c:</b> In function <b>'bad_deref'</b>:
<b>fixits.c:11:13:</b> <span class="boldred">error:</span> <b>'ptr'</b> is a pointer; did you mean to use <b>'->'</b>?
return ptr<span class="boldred">.</span>x;
<span class="boldred">^</span>
<span class="boldred">-></span>
</pre></blockquote></li>
<li>The C and C++ compilers now offer suggestions for misspelled field names:
<blockquote><pre>
<b>spellcheck-fields.cc:52:13:</b> <span class="boldred">error:</span> <b>'struct s'</b> has no member named <b>'colour'</b>; did you mean <b>'color'</b>?
return ptr-><span class="boldred">colour</span>;
<span class="boldred">^~~~~~</span>
</pre></blockquote></li>
<!-- also, pending patch to add fix-it hints to the above -->
<li>New command-line options have been added for the C and C++ compilers:
<ul>
<li><code>-Wshift-negative-value</code> warns about left shifting a
negative value.</li>
<li><code>-Wshift-overflow</code> warns about left shift overflows.
This warning is enabled by default.
<code>-Wshift-overflow=2</code> also warns about left-shifting 1 into
the sign bit.</li>
<li><code>-Wtautological-compare</code> warns if a self-comparison
always evaluates to true or false. This warning is enabled by
<code>-Wall</code>.</li>
<li><code>-Wnull-dereference</code> warns if the compiler detects paths
that trigger erroneous or undefined behavior due to dereferencing a
null pointer. This option is only active when
<code>-fdelete-null-pointer-checks</code> is active, which is enabled
by optimizations in most targets. The precision of the warnings
depends on the optimization options used.</li>
<li><code>-Wduplicated-cond</code> warns about duplicated conditions
in an if-else-if chain.</li>
<li><code>-Wmisleading-indentation</code> warns about places where the
indentation of the code gives a misleading idea of the block
structure of the code to a human reader. For example, given
<a href="https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2014-1266">CVE-2014-1266</a>:
<blockquote><pre>
<b>sslKeyExchange.c:</b> In function <b>'SSLVerifySignedServerKeyExchange'</b>:
<b>sslKeyExchange.c:629:3:</b> <span class="boldmagenta">warning:</span> this <b>'if'</b> clause does not guard... [<span class="boldmagenta">-Wmisleading-indentation</span>]
<span class="boldcyan">if</span> ((err = SSLHashSHA1.update(&hashCtx, &signedParams)) != 0)
<span class="boldcyan">^~</span>
<b>sslKeyExchange.c:631:5:</b> <span class="boldcyan">note:</span> ...this statement, but the latter is misleadingly indented as if it is guarded by the <b>'if'</b>
<span class="boldmagenta">goto</span> fail;
<span class="boldmagenta">^~~~</span>
</pre></blockquote>
This warning is enabled by <code>-Wall</code>.</li>
</ul>
</li>
<li>The C and C++ compilers now emit saner error messages if
merge-conflict markers are present in a source file.
<blockquote><pre>
<b>test.c:3:1:</b> <span class="boldred">error:</span> version control conflict marker in file
<span class="boldred"><<<<<<<</span> HEAD
<span class="boldred">^~~~~~~</span>
</pre></blockquote></li>
</ul>
<h3 id="c">C</h3>
<ul>
<li>It is possible to disable warnings when an initialized field of
a structure or a union with side effects is being overridden when
using designated initializers via a new warning option
<code>-Woverride-init-side-effects</code>.</li>
<li>A new type attribute <code>scalar_storage_order</code> applying to
structures and unions has been introduced. It specifies the storage
order (aka endianness) in memory of scalar fields in structures
or unions.</li>
</ul>
<h3 id="cxx">C++</h3>
<ul>
<li>The default mode has been changed to <code>-std=gnu++14</code>.</li>
<li><a href="http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2015/n4377.pdf">C++
Concepts</a> are now supported when compiling with
<code>-fconcepts</code>.</li>
<li><code>-flifetime-dse</code> is more
aggressive in dead-store elimination in situations where
a memory store to a location precedes a constructor to the
memory location.</li>
<li>G++ now supports
<a href="https://gcc.gnu.org/projects/cxx-status.html#cxx1z.html">C++17</a>
fold expressions, <code>u8</code> character literals,
extended <code>static_assert</code>, and nested namespace definitions.</li>
<li>G++ now allows constant evaluation for all non-type template arguments.</li>
<li>G++ now supports C++ Transactional Memory when compiling with
<code>-fgnu-tm</code>. </li>
</ul>
<h4 id="libstdcxx">Runtime Library (libstdc++)</h4>
<ul>
<li>Extensions to the C++ Library to support mathematical special
functions (ISO/IEC 29124:2010), thanks to Edward Smith-Rowland. </li>
<li>Experimental support for C++17, including the following
new features:
<ul>
<li><code>std::uncaught_exceptions</code> function (this is also
available for <tt>-std=gnu++NN</tt> modes); </li>
<li>new member functions <code>try_emplace</code> and
<code>insert_or_assign</code> for unique_key maps;</li>
<li>non-member functions <code>std::size</code>,
<code>std::empty</code>, and <code>std::data</code> for
accessing containers and arrays;</li>
<li><code>std::invoke</code>;</li>
<li><code>std::shared_mutex</code>;</li>
<li><code>std::void_t</code> and <code>std::bool_constant</code>
metaprogramming utilities. </li>
</ul>
Thanks to Ville Voutilainen for contributing many of the C++17 features.
</li>
<li>An experimental implementation of the File System TS.</li>
<li>Experimental support for most features of the second version of the
Library Fundamentals TS. This includes polymorphic memory resources
and array support in <code>shared_ptr</code>, thanks to Fan You.</li>
<li>Some assertions checked by Debug Mode can now also be enabled by
<code>_GLIBCXX_ASSERTIONS</code>. The subset of checks enabled by
the new macro have less run-time overhead than the full
<code>_GLIBCXX_DEBUG</code> checks and don't affect the library
ABI, so can be enabled per-translation unit.
</li>
<li>Timed mutex types are supported on more targets, including Darwin.
</li>
<li>Improved <code>std::locale</code> support for DragonFly and FreeBSD,
thanks to John Marino and Andreas Tobler.
</li>
</ul>
<h3 id="fortran">Fortran</h3>
<ul>
<li>The <code>MATMUL</code> intrinsic is now inlined for straightforward
cases if front-end optimization is active. The maximum size for
inlining can be set to <code>n</code> with the
<code>-finline-matmul-limit=n</code> option and turned off
with <code>-finline-matmul-llimit=0</code>.</li>
<li>The <code>-Wconversion-extra</code> option will warn about
<code>REAL</code> constants which have excess precision for
their kind.</li>
<li>The <code>-Winteger-division</code> option has been added, which
warns about divisions of integer constants which are truncated.
This option is included in <code>-Wall</code> by default.</li>
</ul>
<!-- <h3 id="go">Go</h3> -->
<!-- <h3 id="java">Java (GCJ)</h3> -->
<!-- .................................................................. -->
<h2 id="jit">libgccjit</h2>
<ul>
<li>The driver code is now run in-process within libgccjit,
providing a small speed-up of the compilation process.</li>
<li>The API has gained entrypoints for
<ul>
<li><a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/jit/topics/performance.html">timing how long was spent in different parts of code</a>,</li>
<li><a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/jit/topics/functions.html#gcc_jit_block_end_with_switch">creating switch statements</a>,</li>
<li><a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/jit/topics/contexts.html#gcc_jit_context_set_bool_allow_unreachable_blocks">allowing unreachable basic blocks in a function</a>, and</li>
<li><a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/jit/topics/contexts.html#gcc_jit_context_add_command_line_option">adding arbitrary command-line options to a compilation</a>.</li>
</ul>
</li>
</ul>
<!-- .................................................................. -->
<h2 id="targets">New Targets and Target Specific Improvements</h2>
<h3 id="aarch64">AArch64</h3>
<ul>
<li>
The new command line options <code>-march=native</code>,
<code>-mcpu=native</code> and <code>-mtune=native</code> are now
available on native AArch64 GNU/Linux systems. Specifying
these options will cause GCC to auto-detect the host CPU and
rewrite these options to the optimal setting for that system.
If GCC is unable to detect the host CPU these options have no effect.
</li>
<li>
<code>-fpic</code> is now supported by the AArch64 target when generating
code for the small code model (<code>-mcmodel=small</code>). The size of
the global offset table (GOT) is limited to 28KiB under the LP64 SysV ABI
, and 15KiB under the ILP32 SysV ABI.
</li>
<li>
The AArch64 port now supports target attributes and pragmas. Please
refer to the <a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/gcc/AArch64-Function-Attributes.html#AArch64-Function-Attributes">
documentation</a> for details of available attributes and
pragmas as well as usage instructions.
</li>
<li>
Link-time optimization across translation units with different
target-specific options is now supported.
</li>
</ul>
<h3 id="arm">ARM</h3>
<ul>
<li>
Support for revisions of the ARM architecture prior to ARMv4t has
been deprecated and will be removed in a future GCC release.
The <code>-mcpu</code> and <code>-mtune</code> values that are
deprecated are:
<code>arm2, arm250, arm3, arm6, arm60, arm600, arm610, arm620, arm7,
arm7d, arm7di, arm70, arm700, arm700i, arm710, arm720, arm710c,
arm7100, arm7500, arm7500fe, arm7m, arm7dm, arm7dmi, arm8, arm810,
strongarm, strongarm110, strongarm1100, strongarm1110, fa526,
fa626</code>. The value
<code>arm7tdmi</code> is still supported.
The values of <code>-march</code> that are deprecated are:
<code>armv2,armv2a,armv3,armv3m,armv4</code>.
</li>
<li>
The ARM port now supports target attributes and pragmas. Please
refer to the <a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/gcc/ARM-Function-Attributes.html#ARM-Function-Attributes">
documentation</a> for details of available attributes and
pragmas as well as usage instructions.
</li>
<li>
Support has been added for the following processors
(GCC identifiers in parentheses): ARM Cortex-A32
(<code>cortex-a32</code>), ARM Cortex-A35 (<code>cortex-a35</code>).
The GCC identifiers can be used
as arguments to the <code>-mcpu</code> or <code>-mtune</code> options,
for example: <code>-mcpu=cortex-a32</code> or
<code>-mtune=cortex-a35</code>.
</li>
</ul>
<!-- <h3 id="avr">AVR</h3> -->
<h3 id="hsa">Heterogeneous Systems Architecture</h3>
<ul>
<li><p>GCC can now generate HSAIL (Heterogeneous System Architecture
Intermediate Language) for simple OpenMP device constructs if
configured with <code>--enable-offload-targets=hsa</code>. A new
libgomp plugin then runs the HSA GPU kernels implementing these
constructs on HSA capable GPUs via a standard HSA run time.</p>
<p>If the HSA compilation back end determines it cannot output HSAIL
for a particular input, it gives a warning by default. These
warnings can be suppressed with <code>-Wno-hsa</code>. To give a few
examples, the HSA back end does not implement compilation of code
using function pointers, automatic allocation of variable sized
arrays, functions with variadic arguments as well as a number of
other less common programming constructs.</p>
<p>When compilation for HSA is enabled, the compiler attempts to
compile composite OpenMP constructs</p>
<blockquote><pre>
#pragma omp target teams distribute parallel for</pre></blockquote>
<p>into parallel HSA GPU kernels.</p>
</li>
</ul>
<h3 id="x86">IA-32/x86-64</h3>
<ul>
<li>GCC now supports the Intel CPU named Skylake with AVX-512 extensions
through <code>-march=skylake-avx512</code>. The switch enables the following
ISA extensions: AVX-512F, AVX512VL, AVX-512CD, AVX-512BW, AVX-512DQ.
</li>
<li>
Support for new AMD instructions <code>monitorx</code> and
<code>mwaitx</code> has been added. This includes new intrinsic
and built-in support. It is enabled through option <code>-mmwaitx</code>.
The instructions <code>monitorx</code> and <code>mwaitx</code>
implement the same functionality as the old <code>monitor</code>
and <code>mwait</code> instructions. In addition <code>mwaitx</code>
adds a configurable timer. The timer value is received as third
argument and stored in register <code>%ebx</code>.
</li>
<li>
x86-64 targets now allow stack realignment from a word-aligned stack
pointer using the command-line option <code>-mstackrealign</code> or
<code>__attribute__ ((force_align_arg_pointer))</code>. This allows
functions compiled with a vector-aligned stack to be invoked from
objects that keep only word-alignment.
</li>
<li>
Support for address spaces <code>__seg_fs</code>, <code>__seg_gs</code>,
and <code>__seg_tls</code>. These can be used to access data via the
<code>%fs</code> and <code>%gs</code> segments without having to
resort to inline assembly.
Please refer to the <a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/gcc/Named-Address-Spaces.html#Named-Address-Spaces">
documentation</a> for usage instructions.
</li>
<li>
Support for AMD Zen (family 17h) processors is now available through
the <code>-march=znver1</code> and <code>-mtune=znver1</code> options.
</li>
</ul>
<!-- <h3 id="mips">MIPS</h3> -->
<h3 id="mep">MeP</h3>
<ul>
<li><p>Support for the MeP (mep-elf) architecture has been
deprecated and will be removed in a future GCC release.</p>
</li>
</ul>
<h3 id="msp430">MSP430</h3>
<ul>
<li><p>The MSP430 compiler now has the ability to automatically distribute code
and data between low memory (addresses below 64K) and high memory. This only
applies to parts that actually have both memory regions and only if the
linker script for the part has been specifically set up to support this
feature.</p>
<p>A new attribute of <code>either</code> can be applied to both functions
and data, and this tells the compiler to place the object into low memory
if there is room and into high memory otherwise. Two other new attributes
- <code>lower</code> and <code>upper</code> - can be used to explicitly
state that an object should be placed in the specified memory region. If
there is not enough left in that region the compilation will fail.</p>
<p>Two new command-line options - <code>-mcode-region=[lower|upper|either]</code>
and <code>-mdata-region=[lower|upper|either]</code> - can be used to tell
the compiler what to do with objects that do not have one of these new
attributes.</p></li>
</ul>
<!-- <h3 id="nds32">NDS32</h3> -->
<h3 id="powerpc">PowerPC / PowerPC64 / RS6000</h3>
<ul>
<li><p>PowerPC64 now supports IEEE 128-bit floating-point using the
__float128 data type. In GCC 6, this is NOT enabled by default,
but you can enable it with -mfloat128. The IEEE 128-bit
floating-point support requires the use of the VSX instruction
set. IEEE 128-bit floating-point values are passed and returned
as a single vector value. The software emulator for IEEE 128-bit
floating-point support is only built on PowerPC Linux systems
where the default cpu is at least power7. On future ISA 3.0
systems (power9 and later), you will be able to use the
-mfloat128-hardware option to use the ISA 3.0 instructions
that support IEEE 128-bit floating-point. An additional type
(__ibm128) has been added to refer to the IBM extended double
type that normally implements long double. This will allow
for a future transition to implementing long double with IEEE
128-bit floating-point.</p></li>
<li><p>Basic support has been added for POWER9 hardware that will use the
recently published OpenPOWER ISA 3.0 instructions. The following
new switches are available:</p>
<ul>
<li><p><u>-mcpu=power9</u>: Implement all of the ISA 3.0
instructions supported by the compiler.</p></li>
<li><p><u>-mtune=power9</u>: In the future, apply tuning for
POWER9 systems. Currently, POWER8 tunings are used.</p></li>
<li><p><u>-mmodulo</u>: Generate code using the ISA 3.0
integer instructions (modulus, count trailing zeros, array
index support, integer multiply/add).</p></li>
<li><p><u>-mpower9-fusion</u>: Generate code to suitably fuse
instruction sequences for a POWER9 system.</p></li>
<li><p><u>-mpower9-dform</u>: Generate code to use the new D-form
(register +offset) memory instructions for the vector
registers.</p></li>
<li><p><u>-mpower9-vector</u>: Generate code using the new ISA
3.0 vector (VSX or Altivec) instructions.</p></li>
<li><p><u>-mpower9-minmax</u>: Reserved for future development.
</p></li>
<li><p><u>-mtoc-fusion</u>: Keep TOC entries together to provide
more fusion opportunities.</p></li>
</ul></li>
<li><p>New constraints have been added to support IEEE 128-bit
floating-point and ISA 3.0 instructions:</p>
<ul>
<li><p><u>wb</u>: Altivec register if -mpower9-dform is
enabled.</p></li>
<li><p><u>we</u>: VSX register if -mpower9-vector is enabled
for 64-bit code generation.</p></li>
<li><p><u>wo</u>: VSX register if -mpower9-vector is
enabled.</p></li>
<li><p><u>wp</u>: Reserved for future use if long double
is implemented with IEEE 128-bit floating-point instead
of IBM extended double.</p></li>
<li><p><u>wq</u>: VSX register if -mfloat128 is enabled.</p></li>
<li><p><u>wF</u>: Memory operand suitable for POWER9 fusion
load/store.</p></li>
<li><p><u>wG</u>: Memory operand suitable for TOC fusion memory
references.</p></li>
<li><p><u>wL</u>: Integer constant identifying the element
number mfvsrld accesses within a vector.</p></li>
</ul></li>
<li><p>Support has been added for __builtin_cpu_is () and
__builtin_cpu_supports (), allowing for very fast access to
AT_PLATFORM, AT_HWCAP, and AT_HWCAP2 values. This requires
use of glibc 2.23 or later.</p></li>
<li><p>All hardware transactional memory builtins now correctly
behave as memory barriers. Programmers can use #ifdef __TM_FENCE__
to determine whether their "old" compiler treats the builtins
as barriers.</p></li>
<li><p>Split-stack support has been added for gccgo on PowerPC64
for both big- and little-endian (but NOT for 32-bit). The gold
linker from at least binutils 2.25.1 must be available in the PATH
when configuring and building gccgo to enable split stack. (The
requirement for binutils 2.25.1 applies to PowerPC64 only.) The
split-stack feature allows a small initial stack size to be
allocated for each goroutine, which increases as needed.</p></li>
<li><p>GCC on PowerPC now supports the standard lround function.</p></li>
<li><p>A new configuration option -<code>--with-advance-toolchain=at</code>
was added for PowerPC 64-bit GNU/Linux systems to use the header files, library
files, and the dynamic linker from a specific Advance Toolchain release
instead of the default versions that are provided by the GNU/Linux
distribution. In general, this option is intended for the developers of
GCC, and it is not intended for general use.</p></li>
<li><p>The "q", "S", "T", and "t" asm-constraints have been
removed.</p></li>
<li><p>The "b", "B", "m", "M", and "W" format modifiers have
been removed.</p></li>
</ul>
<h3 id="s390">S/390, System z, IBM z Systems</h3>
<ul>
<li>Support for the IBM z13 processor has been added. When using
the <code>-march=z13</code> option, the compiler will generate
code making use of the new instructions and registers introduced
with the vector extension facility. The <code>-mtune=z13</code>
option enables z13 specific instruction scheduling without
making use of new instructions.<br/>
Compiling code with <code>-march=z13</code> reduces the default
alignment of vector types bigger than 8 bytes to 8. This is an
ABI change and care must be taken when linking modules compiled
with different arch levels which interchange variables
containing vector type values. For newly compiled code the GNU
linker will emit a warning.</li>
<li>The <code>-mzvector</code> option enables a C/C++ language
extension. This extension provides a new
keyword <code>vector</code> which can be used to define vector
type variables. (Note: This is not available when
enforcing strict standard compliance
e.g. with <code>-std=c99</code>. Either enable GNU extensions
with e.g. <code>-std=gnu99</code> or use
<code>__vector</code> instead of <code>vector</code>.)<br/>
Additionally a set of overloaded builtins is provided which is
partially compatible to the PowerPC Altivec builtins. In order
to make use of these builtins the <code>vecintrin.h</code>
header file needs to be included.</li>
<li>The new command line options <code>-march=native</code>,
and <code>-mtune=native</code> are now available on native IBM
z Systems. Specifying these options will cause GCC to
auto-detect the host CPU and rewrite these options to the
optimal setting for that system. If GCC is unable to detect
the host CPU these options have no effect.</li>
<li>The IBM z Systems port now supports target attributes and
pragmas. Please refer to the
<a href="https://gcc.gnu.org/onlinedocs/gcc-6.1.0/gcc/S_002f390-Function-Attributes.html#S_002f390-Function-Attributes">
documentation</a> for details of available attributes and
pragmas as well as usage instructions.
</li>
<li><code>-fsplit-stack</code> is now supported as part of the IBM
z Systems port. This feature requires a recent gold linker to
be used.</li>
<li>Support for the <code>g5</code> and <code>g6
-march=/-mtune=</code> CPU level switches has been deprecated
and will be removed in a future GCC release. <code>-m31</code>
from now on defaults to <code>-march=z900</code> if not
specified otherwise. <code>-march=native</code> on a g5/g6
machine will default to <code>-march=z900</code>.</li>
</ul>
<!-- <h3 id="rx">RX</h3> -->
<h3 id="sh">SH</h3>
<ul>
<li>Support for SH5 / SH64 has been declared obsolete and will be removed
in future releases.</li>
<li>Support for the FDPIC ABI has been added. It can be enabled using the
new <code>-mfdpic</code> target option and <code>--enable-fdpic</code>
configure option.</li>
</ul>
<h3 id="sparc">SPARC</h3>
<ul>
<li>An ABI bug has been fixed in 64-bit mode. Unfortunately, this change
will break binary compatibility with earlier releases for code it affects,
but this should be pretty rare in practice. The conditions are: a 16-byte
structure containing a <code>double</code> or a 8-byte vector in the second
half is passed to a subprogram in slot #15, for example as 16th parameter
if the first 15 ones have at most 8 bytes. The <code>double</code> or
vector was wrongly passed in floating-point register <code>%d32</code>
in lieu of on the stack as per the SPARC calling conventions.</li>
</ul>
<!-- .................................................................. -->
<h2 id="os">Operating Systems</h2>
<!-- <h3 id="dragonfly">DragonFly BSD</h3> -->
<!-- <h3 id="freebsd">FreeBSD</h3> -->
<h3 id="linux">Linux</h3>
<ul>
<li>Support for the <a href="http://www.musl-libc.org">musl C library</a>
was added for the AArch64, ARM, MicroBlaze, MIPS, MIPS64, PowerPC,
PowerPC64, SH, i386, x32 and x86_64 targets. It can be selected using the
new <code>-mmusl</code> option in case musl is not the default libc. GCC
defaults to musl libc if it is built with a target triplet matching the
<code>*-linux-musl*</code> pattern.</li>
</ul>
<h3 id="rtems">RTEMS</h3>
<ul>
<li>The RTEMS thread model implementation changed. Mutexes now
use self-contained objects defined in Newlib <sys/lock.h>
instead of Classic API semaphores. The keys for thread specific data and
the <code>once</code> function are directly defined via <pthread.h>.
Self-contained condition variables are provided via Newlib
<sys/lock.h>. The RTEMS thread model also supports C++11
threads.</li>
<li>OpenMP support now uses self-contained objects provided by Newlib
<sys/lock.h> and offers a significantly better performance compared
to the POSIX configuration of <code>libgomp</code>. It is possible to
configure thread pools for each scheduler instance via the environment
variable <code>GOMP_RTEMS_THREAD_POOLS</code>.</li>
</ul>
<h3 id="aix">AIX</h3>
<ul>
<li>DWARF debugging support for AIX 7.1 has been enabled as an optional
debugging format. A more recent Technology Level (TL) and GCC built
with that level are required for full exploitation of DWARF debugging
capabilities.</li>
</ul>
<h3 id="solaris">Solaris</h3>
<ul>
<li>Solaris 12 is now fully supported. Minimal support had already
been present in GCC 5.3.</li>
<li>Solaris 12 provides a full set of startup files (<code>crt1.o</code>,
<code>crti.o</code>, <code>crtn.o</code>), which GCC now prefers over
its own ones.</li>
<li>Position independent executables (PIE) are now supported on
Solaris 12.</li>
<li>Constructor priority is now supported on Solaris 12 with the system
linker.</li>
<li><code>libvtv</code> has been ported to Solaris 11 and up.</li>
</ul>
<h3 id="windows">Windows</h3>
<ul>
<li>The option <code>-mstackrealign</code> is now automatically activated
in 32-bit mode whenever the use of SSE instructions is requested.</li>
</ul>
<!-- <h3 id="vxmils">VxWorks MILS</h3> -->
<!-- .................................................................. -->
<!-- <h2>Documentation improvements</h2> -->
<!-- .................................................................. -->
<h2>Other significant improvements</h2>
<ul>
<li>The <code>gcc</code> and <code>g++</code> driver programs will now
provide suggestions for misspelled command line options.
<blockquote><pre>
$ gcc -static-libfortran test.f95
gcc: <span class="boldred">error:</span> unrecognized command line option <b>'-static-libfortran'</b>; did you mean <b>'-static-libgfortran'</b>?
</pre></blockquote></li>
<li>The <code>--enable-default-pie</code> configure option enables
generation of PIE by default.</li>
</ul>
<!-- ==================================================================== -->
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<address>For questions related to the use of GCC,
please consult these web pages and the
<a href="https://gcc.gnu.org/onlinedocs/">GCC manuals</a>. If that fails,
the <a href="mailto:gcc-help@gcc.gnu.org">gcc-help@gcc.gnu.org</a>
mailing list might help.
Comments on these web pages and the development of GCC are welcome on our
developer list at <a href="mailto:gcc@gcc.gnu.org">gcc@gcc.gnu.org</a>.
All of <a href="https://gcc.gnu.org/lists.html">our lists</a>
have public archives.
</address>
<p>Copyright (C)
<a href="http://www.fsf.org">Free Software Foundation, Inc.</a>
Verbatim copying and distribution of this entire article is
permitted in any medium, provided this notice is preserved.</p>
<p>These pages are
<a href="https://gcc.gnu.org/about.html">maintained by the GCC team</a>.
Last modified 2016-04-27<!-- IGNORE DIFF
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